This invention relates to a semiconductor integrated circuit device with a fault detecting function which enables detection of output signal potentials of respective logic function blocks forming the integrated circuit device, and, more particularly, to such a semiconductor integrated circuit device which can detect fault conditions of the integrated circuit device itself on the basis of predetermined combinations of input/output function signals produced in response to test patterns for checking the operations of the integrated circuit device, and which can also detect fault conditions of logic function blocks that cannot be detected on the basis of the input/output function signal combinations.
Some conventional semiconductor integrated circuit devices have a function for determining fault conditions of logic function blocks, in the integrated circuit device, based on output signals developed by the respective blocks in response to input signals applied according to predetermined test patterns. Fault conditions of only 60-70% of the entire logic function blocks can be detected using the method however, troublesome and complicated efforts are required to detect faults in the rest of the blocks.
In an effort to eliminate this problem, semiconductor integrated circuit devices with fault detecting functions have been disclosed. Disclosed examples include: "High Performance CMOS Array with an Embedded Test Structure", pages 4.1.1-4.1.4, IEEE 1990 CUSTOM INTEGRATED CIRCUITS CONFERENCE; "Embedded test circuitry improves fault detection in digital ASICs", COMPUTER DESIGN, 1 December 1989; and in an article, "CrossCheck: A cell Based VLSI Testability Solution", 26th DAC Proceedings, 1989.
FIG. 1 shows a basic concept of the prior art devices disclosed in the above-cited articles. In the peripheral portions of an integrated circuit device generally denoted by a reference numeral 10, I/O pads 1, 1, 1 . . . 1 associated with respective sections of the .integrated circuits in the device are provided. The integrated circuit device includes a plurality of sense lines 2, 2 . . . 2 and a plurality of probe lines 3, 3 . . . 3, which are used for detecting fault conditions.
The integrated circuit device includes also logic function blocks 41, 42, 43 which perform basic logic functions. As logic function blocks in the integrated circuit device, in addition to AND and NAND circuits shown in FIG. 1, OR circuits, NOR circuits and any other logic circuits can be used depending the intended functions. A probe line driver 6 is used to drive desired ones of the probe lines 3. A sense line receiver 7 reads signals from desired sense lines 2. The integrated circuit device 10 further includes input terminals 8 for applying input signals to a logic circuit comprising a plurality of logic function blocks, and an output terminal delivering an output signal from the logic circuit.
Referring to FIG. 2, the output of each of the logic function blocks 41, 42 and 43 of the conventional semiconductor integrated circuit device shown in FIG. 1, has a sense transistor 12 for sensing an output signal potential. A logic function block 4 represents any one of the logic function blocks shown in FIG. 1. An output 11 of the logic function block 4 is connected to one of the sense lines 2 through a source-drain path of the output signal potential sensing transistor 12 that has a gate connected to one of the probe lines 3. The output pin 11 is further connected to either another logic function block or output terminal 9 via a line 13.
Referring to FIGS. 1 and 2, in order to determine whether any one of the respective function blocks of the integrated circuit device exhibits a fault condition, the integrated circuit is activated to operate, and the probe lines 3 are driven by the probe line driver 6 to sequentially enable the sense transistors 12. Output signals from the respective logic function blocks 4 are read, through the associated sense transistors 12 and sense lines 2, by the sense line receiver 7. Whether the respective logic function blocks 4 are in a fault condition is determined based on the output signals read by the sense line receiver 7.
In order to improve a fault detection efficiency of conventional semiconductor integrated circuit devices with fault detecting function, the probe lines 3 and the sense lines 2 are arranged in a mesh pattern as shown in FIG. 1 so that output signal potentials from all of the logic function blocks or from as many logic function blocks as possible can be sensed. Furthermore, sense transistors for sensing output signal potentials are provided even for those logic function blocks whose fault conditions can be detected by basic input-output signal combinations produced in accordance with predetermined test patterns. Therefore, the integrated circuit device requires a large number of sense transistors, a large number of probe lines for enabling the sense transistors, a large number of sense lines for reading output signals from the logic function blocks through the sense transistors, a probe line driver, and a sense line receiver. These components disadvantageously occupy large areas of active and wiring regions.
The present invention can eliminate the above-described problem, by providing a semiconductor integrated circuit device with fault detection function occupying a reduced area of the active and wiring regions on an integrated circuit.